To enhance processing speed and efficiency, modern processing systems typically include multiple processing units that concurrently execute instructions. The different processing units are supported by a memory hierarchy that stores data for the different processing units, whereby the memory hierarchy can include one or more caches dedicated to corresponding processing units, one or more caches shared between the processing units, and a system memory (also referred to as “main memory”) that stores data available to all the processing units, or any combination thereof. The processing system implements a specified memory management scheme to govern how data is shared between the different processing units and the different caches of the cache hierarchy and to ensure data coherency throughout the memory hierarchy by enforcing a specified coherency protocol.
To support the coherency protocol, the processing system includes one or more coherency managers. A coherency manager maintains a coherency directory having entries that store coherency information for all cache lines that are cached in the cache hierarchy. Conventionally, the coherency directory includes an entry for each cache line of the entire memory hierarchy. However, maintaining coherency information for each cache line requires the coherency directory to be provisioned with a large memory structure to store the coherency information. Accordingly, some processing systems employ a coherency manager that includes a coherency directory having a coarser granularity, such that each entry of the coherency directory corresponds to multiple contiguous cache lines (referred to as “pages”) of the memory hierarchy. The coherency manager assigns individual entries of the coherency directory to corresponding pages as cache lines corresponding to the pages are loaded into the caches. However, some memory access patterns can cause the coherency directory to run out of entries before the caches are fully utilized, increasing memory management overhead and reducing processing efficiency.